Re: gEDA-user: using Icarus Verilog

[Brendan J Simon <brendan.simon@bigpond.com>]

There must be some examples for people to look at (in conjunction with 
the book).
There is a verilog test suite maintained in a cvs tree somewhere.  I 
think Steve Wilson is the maintainer and there is a link from the Icarus 
web site if my memory serves me well.

Does this test suite have code that could demonstrate test benching 
desings ???

Brendan Simon.



Stephen Williams wrote:

>nadig@web.cs.ndsu.nodak.edu said:
>
>>I am able to compile the verilog source in vvp format.
>>But how do i input stimuli to the verilog model to run the simulations
>>? 
>>
>
>You do need a Verilog book. The standard answer to this question,
>though, is that you need to write a "test bench." That is, Verilog
>code that instantiates your module and manipulates the ports of
>your instantiated module.
>
>And now the book:
>	Verilog Quickstart!
>	Second Edition
>	James M. Lee
>	Kluwer Academic Publishers
>	ISBN 0-7923-8515-2
>
>