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Re: gEDA-user: Logic simulation
> > Yeah, that might be of interested. Anybody have any docs on
> > what IRSIM decks look like?
Since a picture tells more than a thousand words, there's the equivalent
of "hello world" as an IRSIM simulation file. This is a simple
two-transistor CMOS inverter, exported from a schematics made with
Electric. Node a=input, node out=output.
| units: 200 tech: schematic format: SU
| Facet basic_analog:A_INV{sch}, created Thu Jun 7 20:01:10 2001, modified Tue Aug 21 13:57:16 2001
p a out vdd 2 2 -7 15 g=S_vdd s=A_12,P_14 d=A_12,P_14
n a gnd out 2 2 -7 7 g=S_gnd s=A_12,P_14 d=A_12,P_14
Some more interesting material about IRSIM, except of course the man page
that comes along it, is at
http://www.ee.oulu.fi/~tuukkat/tmp/irsim.pdf
I also have made some enhancements to IRSIM (especially a Readline
support), available at http://www.ee.oulu.fi/~tuukkat/electric/irsim/.