Re: [f-cpu] snapshot QDCPOC+YGASM

[Yann Guidon <whygee@f-cpu.org>]

hi,

Juergen Goeritz wrote:
> Hi guys,
> 
> endianess always is a big issue!
i don't know about today, but at a time, people could die
in the flamewars ;-)

> That's my experience from some work in big companies :-)
> 
> But to come back to topic, it's always necessary to talk
> about the place too! Endianess can be viewed at the memory
> interface, at the decoder input or on the internal busses.
> Please do not intermix these!!!

sure. I am speaking about the encoding in the file or in memory.
The rest is only a matter of naming the wires in the right order.

> Enidaness (for the software guy) is only interesting when
> accessing a register and when the data is loaded/stored
> in memory. So please watch the memory <> register interface
> and the memory <> instr. decoder interface. If you decide
> to make to change in endianess somewhere please watch for
> 'sideeffects'. I know you know that too... ;-)
it is obvious that a problem at that early stage in the pipeline
can have "nasty side effects" :-P

> JG
WHYGEE
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