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Re: [f-cpu] Re: Floating-Point?



Juergen Goeritz wrote:
> 
> On Thu, 16 Aug 2001, Glenn Alexander wrote:
> > I am thinking that taking the two-register approach might be
> > over-complicating matters. Since F-CPU is intended to later be scaled above
> > 64 bits, if someone wanted 128-bit floats in the future they would impliment
> > a 128-bit F-CPU. Especially for the FC-0 and probably for the FC-1, KISS
> > (Keep It Simple for us Stupid people).
> >
> > BTW: I am wondering about the reasons for having endian-ness encoded in the
> > instruction. How often do you need to change endinianness. I am thinking a SR
> > for endinian would free up that bit as well as allowing other endiniannesses
> > as well as big and little (Not in popular usage at present but I can think of
> > several other bizaar ways to re-arrange the bits in a word that may be useful
> > in some obscure application).
> 
> Hi,
> 
> enidaness things may cost a lot in some implementations. Think
> of some network protocols having fixed byte order that are not
> compliant with the architecture. Network needs fast responding
> time though. I had that problem once and thanks to the RISC
> processor it was possible to access different endianess memory
> banks that could be overlapped... ;-)
> 
> >
> > An alternative might be:
> > 000 - 8 bits (mandatory)
> > 001 - 16 bits (mandatory)
> > 010 - 32 bits (mandatory)
> > 011 - 64 bits (mandatory)
> > 100 - 128 bits
> > 101 - 256 bits
> > 110 - application defined
> > 111 - maxWidth (the maximum avaliable width)
> >
> > 256-bit floats anyone?
> 
> Please, do not use maxWidth here but just state something
> like 'reserved - for further extension'. That helps to use
> it in a new or better way later on...
> 
> JG
> 
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Can't both the endands default and byte/word sizes and floating point sizes
be setup from special registers rather than hard coded into the instruction
path decoding.
Ben.
PS.What would be nice is to have non standard sizes for special
functions. While not used any more 3 - 5 bit fields come to mind
for packing 15 bit colors for a video display.


-- 
Standard Disclaimer : 97% speculation 2% bad grammar 1% facts.
"Pre-historic Cpu's" http://www.jetnet.ab.ca/users/bfranchuk
Now with schematics.
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