[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: Rep:Re: Re: [f-cpu] No latches, please !



On Fri, Feb 15, 2002 at 02:48:54AM +0100, Yann Guidon wrote:
[...]
> > A latch is quicker in terms of what? Delay time? Setup time? Clock
> > frequency?
> 
> first, it's a bit smaller. Depending on the amount of control logic,
> the gain varies. The memory cell (4 transistors) requires decoding
> and clock buffering, IIRC the sxlib FF uses around 20 transistors.
> 
> Setup time + hold are the same or not, depending on the kind
> of gates you use. For example, in sxlib, they use a couple of 4T cells
> which are overwritten by using a buffer with high driving capability.
> On of the inverters of the 4T cell has a low drive and the buffer can
> overwrite the previous value.

Master-slave-FF with the cheapest latches available?

[...]
> > Latches have one big disadvantage: they can become transparent.
> and sometimes, they do it :-)

That's the problem ;)

> This is both an advantage and a drawback so you have to choose
> where to use them. For example, the register set uses latches,
> both for the registers and their "showdow flags" because we want
> to know the flag's value, EVEN during a cycle when it is being
> written to...

Horror! As long as the latch is transparent, you can't be sure that
its outputs are correct (and stable), so using them is absolutely
pointless. If you need the value of the flag before the register is
written, grab it at the input.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/