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Re: [f-cpu] Coding for Synthesis
On Thu, Jul 11, 2002 at 10:23:23AM +0200, Just an Illusion wrote:
[...]
> >>> BTW: It is considered good style to write one process per
> >>> pipeline stage (unless the pipeline is `forked'), and put the
> >>> `if rising_edge(clock_signal)' clause at the very end of the
> >>> process, as shown.
> >>>
> >>BTW (2) : It is considered good style to write one process to drive only
> >>one signal.
> >>
> Sorry I have forget to add "in case of edge-sensitive sequential logic"
Some people also recommend to use two separate processes for sequential
and combinatorial stuff. I agree with that in certain cases - e.g.
when the code is written in `state machine style'. For the F-CPU with
its huge number of pipeline registers, the `process per stage' variant
is much more readable.
> >And replicate everything that's common? No, thank you.
> >
> The code replication can be fastidious but that can help the synthesizer
> to give a better netlist.
Sorry, but that doesn't sound logical at all. If the synthesizer can
`factor out' common sub-circuits, it can do so in any case - and if it
can't, you better do it manually.
> >*Who* recommends this, BTW?
> >
> By example : Synopsis, Symplicity, Examplar...
> This is not a mandatory condition but it can help synthesis :-)
If a synthesizer needs help with *that*, it's probably not worth the
(huge amount of) money you pay for it ;)
--
Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
"All I wanna do is have a little fun before I die"
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