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Re: [f-cpu] New snapshot for EU_INC and EU_CMP

Michael Riepe wrote:

> Therefore we only use elements that are supposed to be available
> everywhere: and/or gates with 2...4 inputs, 2-input xor gates, inverters
> and muxes. With the famous `6 Gate Rule', any of them count as 1 gate.
> Bigger elements (like an 8-input and gate) count as 2 or more gates.
> After the first synthesis experiences, I later added another rule:
> 2-input xors count as 2 gates, and the sum of gate delays must not
> exceed 10. I call this the `6G/10T' rule.

What about inverted inputs? Do they count as a gate and what about
flip/flop set up and delay times and what memory elements can
one count on.

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