Re: gEDA-user: About polygon clearances

[Eduardo Santana <electronics_questions@xxxxxxxx>]

--- El mar, 21/10/08, Stefan Salewski <mail@xxxxxxxxxxxx> escribió:

> De: Stefan Salewski <mail@xxxxxxxxxxxx>
> Asunto: Re: gEDA-user: About polygon clearances
> Para: electronics_questions@xxxxxxxx, "gEDA user mailing list" <geda-user@xxxxxxxxxxxxxx>
> Fecha: martes, 21 octubre, 2008 4:13
> Am Dienstag, den 21.10.2008, 15:21 +0000 schrieb Eduardo
> Santana:
> > Hello guys,
> > 
> 
> I think you have component and GND layer in the same layer
> group, so
> same physical copper layer is used. But your traces cut
> inner area from
> outer area. There would be no electrical connection. If you
> connect
> outer area to your ground signal GND, inner is not
> connected, it is only
> an copper area connected to nothing, so pcb program deletes
> it.
> 
> You may make a connection, or use different groups for
> component and GND
> to make a two sided board.
> 
> Just my guess.

You're so rigth there, I don't know why I didn't think of it, though this is a one side board.

Perhpaps as you suggest I should connect all that extra copper to ground and get advantage on it to eliminate all the extra routing I made taking ground to where it was needed.

Many thanks,

Eduardo.




      



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