gEDA-user: Driving the netlist from PCB (instead of gschem)

[Ben Jackson <ben@xxxxxxx>]

Projects with microcontrollers and FPGAs often have a lot of flexibility
in how things get connected.  My workflow for those projects is to build
a sparsely connected schematic and then move to PCB to explore geometry
options.  Once I see what will be easy to route in PCB I start making
connections based on the physical layout.  Sometimes I do this by picking
a starting pin and assigning them sequentially in gschem (FPGAs make this
fairly easy, at least with "linear" packages).  Sometimes I use 'D' and
'Shift-D' to annotate pins or bring up the whole package in PCB so I know
which pins I can consider and then just route them (with auto-DRC disabled,
kind of a bummer) and use the conflicts to back-annotate the PCB.

I'd really like to be able to do a couple of things more easily:

1.  I'd like be able to express the design requirements in gschem and
have them visible in PCB.  For example, I'd like to say "connect this
SRAM address bus to this bank of FPGA pins... somehow" and see that in
PCB.  Some kind of "meta rat" that would help me see both the geometry
and the pins that are in play.

2.  I'd like to be able to resolve these dependencies (even in the absence
of 1, as today) by drawing lines in PCB and having the info get back to
gschem automatically.  Perhaps by adding a wire+netlist attribute+busripper
at the appropriate pin.

Does anyone know if/how good commercial tools do this?

Any ideas for how to express a "meta rat"?  How to visualize it?  How to
specify it in gschem, in a netlist, etc?

Any better ideas for how a line drawn in PCB could be automatically driven
back to a schematic?  Perhaps as a "rat" in gschem??

-- 
Ben Jackson AD7GD
<ben@xxxxxxx>
http://www.ben.com/


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