[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]

Re: [f-cpu] IDU News; synthesis report



On Tue, Apr 08, 2003 at 03:22:16PM +0200, devik wrote:
> > > I have had to use Spartan2E because SRT is too big. On other
> > > side 2E has much faster routing so that timing for SRT is
> > > 90 MHz !!
> >
> > Unfortunately, the numbers aren't comparable any longer :(
> 
> Ok, ASU on 2E: 104.745MHz

Looks good.

> By the way, I synthetized scalar 64 bit adder and 32bit multiplier
> for compare.
> Adder (not pipelined): 120 MHz, 155 slices
> Adder (2 stages):      160 MHz, 198 slices

That's a plain adder, right?  No subtract, saturate or average
functions?

> Mult (not pipelined):  50 MHz,  344 slices

What kind of multiplier?

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/