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Re: [f-cpu] F-CPU SoC
Le 2015-04-01 13:30, Nikolay Dimitrov a ÃcritÂ:
Hi Yann,
Hi !
So I'm proposing for the following - let's think about how a
F-CPU-based SoC should look like.
The trick is : it will look like what is needed in each specific
case. There will be no "one true" F-CPU SoC, but adaptations of a
generic model...
Almost. It would be great if the ISA stays the same as much as
possible,
but the ISA implementations and their surrounding are adapted to suit
better the intended application. As usual, this is imho and everyone is
welcome to not agree with me and propose a better solution :D.
Once again, the term "SoC" needs to be properly used :-)
SoC means "System on a Chip", so I assume you speak about the whole
system in its chip (most probably FPGA).
I didn't mean that the archicture or ISA would change,
but the CPU is one block among others. Of course, the ISA should
remain stable, parts may be implemented or not, but the whole chip
(SoC) will be heavily adapted for each application.
In addition to the SoC topic - I personally think that a CPU design
is less and less important only by itself,
I agree. The tools are critical. in F-CPU, the tools are not just
critical, but they must also be free.
I have some extra-pervert ideas for the tooling, but need some more
time
before giving actual proposal :D.
please elaborate :-)
and there are tons of other blocks that need to orchestrate
perfectly with the CPU in order to achieve a usable performance out
of the system. So would be great if we consider touching the SoC
topic sooner than later.
I agree, so let's move on to the F-GPU implementation.
Yep, F-GPU can be an excellent base for one of the SoC type
definitions.
At this moment i'm trying to source the AFS600 that will be used for the
base system that performs the network programming, analog I/O,
configuration etc.
I have several "starter kit" boards, one with the same AFS600 indeed,
so I could prototype a few stuff, but also more powerful boards with
AFS1500,
which might be ok for early F-CPU implementations. However the I/Os are
minimal, there is no external RAM, the interfaces are lacking...
so it can't implement a whole system.
I suppose that some people will want to use a different FPGA or vendor.
That's why the modular approach of the GPL (now F-GPU) as it was
imagined 6 years ago
is interesting. The "base system" provides a common interface and a
debug
environment, no device driver is needed and the more powerful board
(possibly more expensive) can be of any kind. We can define a connector
in advance so the base and expansion boards can be created in parallel
:-)
Regards,
yg
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