Re: [f-cpu] Register Bank

[Juergen Goeritz <goeritz@oekomm.de>]

Hi,

On Mon, 6 Aug 2001, Yann Guidon wrote:
> i am currently writing the register set part of QDCPOC2.
> it doesn't look much like what was posted here, in C or VHDL.
> i'll soon make an attempt to post a VHDL file.
> 
> basicly, the register set is split into 5 "banks" with individual
> write enables. what is even more difficult is how to handle the
> flags in parallel. The reason is that i have not practiced VHDL
> for a long time :-/

How comes that you use '5' banks? I remember the number of
registers to be 2^n even. 32/5 doesn't fit, 64/5 doesn't fit
either. I am a bit puzzled now. :?)

> you'll have to be patient, comprehensive, and hint me to the errors
> or mistakes that i've made.

Sure. ;-)

JG

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