Re: [f-cpu] Re: Floating-Point

[Yann Guidon <whygee@f-cpu.org>]

hi,

nicO wrote:
> Yann Guidon a écrit :
<>
> > Currently i need hints about core generators for the register set.
> > i don't know precisely how to handle the partial writes and the speed
> > i can get.
> Typically register bank could be seen as multiported SRAM memory. So
> it's hard for me to understand why you need 5 flags to write back the
> registers. When you write back a none SIMD 8 bit result does the 56
> other bits remain unchange or are zeroed ?

in our case, the 5 write masks are "write enable"s. so if the bit
is not set, you don't update the register subfield. In fact, i think
that the "lazy way" is a set of 5 banks of 63 registers, each with
2 common register write addresses but with 1 write enable bit per bank.
Of course, semi-manual layout would help, but it would be too easy ...

> nicO
WHYGEE
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/