Rep:[f-cpu] about the scheduler...

["Nicolas Boulay" <nicolas.boulay@ifrance.com>]

-----Message d'origine-----
De: Yann Guidon <whygee@f-cpu.org>
A: fm <f-cpu@seul.org>
Date: 02/08/02
Objet: [f-cpu] about the scheduler...

hi !

Jaap made a drawing :
http://f-cpu.seul.org/~f-cpu/new/scheduler.png

This does not take into account the problem of the 3r1W
cases (or 2R2W, depends), where the 4rth register number
is this of the 3rd field with the LSB inverted.
There must be a comparison with this negated bit,
but fortunately it is easier to write it in VHDL
than explain it by email :-)

Otherwise, the drawing looks more complex than it is,
it's just some FF, MUX and comparators that are copy/pasted
and the basic principle is there.

>>> "just" some muxes ? :p but i always don't understand why you need a
specific unit to do it and not displaced the task to each unit.

>>> To do the scoreboard stuff, a memory could be used but it's could
not be the fastest design possible.
nicO

WHYGEE
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