[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [f-cpu] Instruction census
Hi,
> 98104 instructions total
> 13079 move 13.3% ( 13.3% total)
> 10846 load 11.0% ( 24.3% total)
> 3545 storei 3.6% ( 78.1% total)
> 3533 loadi 3.6% ( 81.7% total)
> 3459 store 3.5% ( 85.3% total)
> 21383 lsu 21.7% ( 21.7% total)
Did you use the new register allocator for this test ? I hope it will change
a lot of result for RISC CPU, and perhaps it will remove some loadi/storei,
but I don't know the impact for load/store (Did you have an idea why we have
3 time more load than store, but loadi and storei are very close) .
> Goals for optimization (IMHO):
> - reduce number of load/store instructions
Perhaps it's more easy for loadi/storei, but I really want to know where all
this load came from.
> - increase number of conditional moves (in favor of jmp{cc})
> - avoid shift-and-add where mul/mac is faster
Hum, what about a "mac"shift instruction ?
> - make use of divrem[s] instruction
> - make use of SIMD instructions
I think that gcc support SIMD only for string function, it's really hard to
give a real SIMD support to gcc.
Cedric
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu in the body. http://f-cpu.seul.org/