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Rep:Re: [f-cpu] How to increase the mip/mhz ratio.



Vector computing are the best for mathematical stuff
(heavy calcul). But not so useful for data base
transaction. I have try to think about an instruction
to speed up look up table search.

An instruction who could help you to associat a value
with another one. It will be by using an associative
memory, but there is many probleme at the context
switch and for a compiler. Or maybe will could find a
way to speed up hash fonction. We should find some
thing to accelerate data research used by so many
program (Data base, IA, even GUI,...).

Stack machine seems to be great for very little cpu,
maybe for the future with thousand of the processors
on a chip, and a good compiler to use them. But for
raw power, that's doesn't sound good.

I'm definetly convince that we don't have to do
superscalar processors. Or we could do it but with
specific architecture, we'll loose far to much die
area for stupid thing. By making some reaserch for
the HAL conference, i just read that common
processor(pentuim3,powerpc, alpha) have only 2
integer pipelines. But have 10 times the number of
transistors compare to the previous architecture.

For my proposal, with separate memory access, "je me
suis chier dessus" i forget that we need 2 register
access. so we need at least 6 more bit (46 bit).
Whygee could you explain why it's so hard to work
with larger instruction word ? Cache memory subsystem
could handel it. We don't need increment, because
that could down with the other part of the
instruction.

Marco:
>IMO directly encoding dependency into instructions
is the best low
>overhead way to allow scalability BTW.

My little vliw bit that come back ;p That's taken
from TI vliw arch, to avoid filling slot by nop.
Describing all difficulties in the instruction word
could be the simplest way after when writing the
fcpu.

nicO

 
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