Re: spinlocks (was Re: [f-cpu] another DATE report)

[Michael Riepe <michael@stud.uni-hannover.de>]

On Mon, Mar 18, 2002 at 12:41:41PM +0100, Yann Guidon wrote:
> hello,
> 
> Christophe wrote:
> > > We could easily do this kind of operation in hardware, btw.
> > Oh fine.
> 
> just a question : "how" ?

	repeat
		pull the requested memory location into the cache
		make the executing CPU the owner of the cache line (SMP)
		read data and compare
		if (the line is still valid and owned by us)
			if (the result was true)
				write data
			end if
			return (result)
		end if
	end repeat

> > > [...]
> > > > A CAS2 is in fact two atomic CAS :
> > > >
> > > > int CAS (int *pointer1,int *pointer2,int requested_value1,int
> > > > requested_value2,int new_value1,int new_value2) {
> > > >     if ((requested_value1 == *pointer1) && (requested_value2 == *pointer2)) {
> > > >         *pointer1 = new_value1; *pointer2 = new_value2; return true;
> > > >     }
> > > >     return false;
> > > > }
> 
> and don't tell me "We could easily do this kind of operation in hardware, btw." !

Of course not.

> there are 2 pointers and 4 values with CAS2 ! Unless you use several instructions,
> the instruction itself would require at least 36 bits for the operands.

Right -- we'll have to emulate CAS2 in software. But that's not a problem
if we have at least one atomic read-modify-write instruction.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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