Re: [f-cpu] another DATE report

["Christophe" <christophe.avoinne@laposte.net>]

CAS : Compare-And-Swap is a READ-MODIFY-WRITE operation which is atomic and
allow us to update value in memory without unconsistancy.

in C :

int CAS (int *pointer,int requested_value,int new_value) {
    if (requested_value == *pointer) {
        *pointer = new_value; return true;
    }
    return false;
}

Example of a CAS application : TAS, Test-And-Set, wellknown:

int TAS (int *pointer) {
    return CAS (pointer,0,1);
}

A spinlock :

void spinlock (int *pointer) {
    while (TAS (pointer));
}

void spinunlock (int *pointer) {
    *pointer = 0;
}

A CAS2 is in fact two atomic CAS :

int CAS (int *pointer1,int *pointer2,int requested_value1,int
requested_value2,int new_value1,int new_value2) {
    if ((requested_value1 == *pointer1) && (requested_value2 == *pointer2)) {
        *pointer1 = new_value1; *pointer2 = new_value2; return true;
    }
    return false;
}

Examples :

How to push a element in a stack :

void atomic_push (struct stack *stack,struct stack_node *element) {
    struct stack_node *requested_top;
    int requested_version;
    do
        {
            requested_top = stack->top;
            requested_version = stack->version;
            element->link = requested_top;
        }
    while (CAS2
(&stack->top,&stack->version,requested_top,requested_version,element,requested_
version+1));
}

How to pop a element in a stack :

struct stack_node *atomic_pop (struct stack *stack) {
    struct stack_node *requested_top,*next_element;
    int requested_version;
    do
        {
            requested_top = stack->top;
            requested_version = stack->version;
            next_element = requested_top->link;
        }
    while (requested_top && CAS2
(&stack->top,&stack->version,requested_top,requested_version,next_element,reque
sted_version+1));
    return requested_top;
}

they work as well in UP mode as in SMP mode in a user code. No need of blocking
syncronisation, so no need to enter kernel mode if necessary, etc.

----- Original Message -----
From: Michael Riepe <michael@stud.uni-hannover.de>
To: <f-cpu@seul.org>
Sent: Monday, March 18, 2002 12:41 AM
Subject: Re: [f-cpu] another DATE report


> On Sun, Mar 17, 2002 at 01:02:10PM +0100, Christophe wrote:
> > Well, it's true i'm shy in english :-)
> >
> > More seriously, I think the issue about the time penality about using CAS
and
> > CAS2 is overstated. The solution offered by Yann to replace it with a fix
array
> > of semaphores through the SR mechanisms is an evidence that either he don't
> > know about what we are really talking or he misunderstands the real
purposes of
> > CAS2. Yann, let me tell you that your solution is really clumsy (I will
explain
> > why). Personnaly, I think that you are too more confident about yourself -
> > especially since you states everytime that you are the only one who code.
>
> Wrong. But I haven't seen much VDHL from anybody except Yann, either.
>
> Ok, let's forget that for the moment. In order to get the big picture
> and be able to have an opinion of my own: what the heck *is* CAS/CAS2?
> I suppose it's not the Column Address Strobe signal found in DRAMS...
>
> URLs welcome.
>
> --
>  Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
>  "All I wanna do is have a little fun before I die"
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