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[f-cpu] Smooth Register backup issues...

Some thoughts about SRB:

Expensive approach: On initiation of SRB, all registers are backed
up to a mirror set of registers. Every register is directly connected
to its mirror partner (makes 64x63 connections!). Mirroring can
take place in one clock cycle this way (much like a snapshot backup
of a journaling filesystem). Writing out the backup to the RAM is
performed as described in the SRB section of the manual.

Cheap approach: The compiler shuffles up registers in a random way,
reducing the probability that r1 has always to be backed up and is the
first register used by the new context (programmers tend to use r1

RISC = Redelegate all Important Stuff to the Compiler

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