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Re: [f-cpu] registers



Hi Mohamed,
hi rest-of-the-f-gang,

> So I was saying in the e-mail that I just joined the team. I am trying 
> to get some information on the EU_IDU in order to look and see what I 
> can do.

Everything you like to. But first let me summarize the status quo:

I'm still playing with the SRT divider, and I guess I found a way to do
SIMD integer divisions with few extra code (that is, gates). The unit
will deliver one bit/cycle but needs some extra cycles for preparation
and post-processing. This approach works best for large chunks.

Compare-and-subtract, subtract-and-restore or non-restore algorithms will
work with chunk sizes > 8 bit, but they will take two cycles/bit because
the add/subtract subunit doesn't fit into a single pipeline stage.
They're fine for 8-bit operands but too expensive for larger chunks.
Cedric has written an 8-bit divider that is included in the latest
snapshot.

Finally, iterative solutions (like Newton-Raphson) will not only be rather
slow (each step requires at least two successive arithmetic operations,
at least one of them being a multiplication), but may also produce
incorrect results due to limited precision (rounding errors). IMHO,
they're suited for FP division only.

Ideas/suggestions welcome.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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