Re: [f-cpu] Something new to play with :)

[Michael Riepe <michael@stud.uni-hannover.de>]

On Mon, Sep 24, 2001 at 10:16:05AM +0300, Kim Enkovaara wrote:
[...]
> We should take some chip as a reference and always synthesize for it.
> Otherwise the results are not comparable. But to even get some feeling I
> synthesized this block to Virte2 (XCV2V1000-BG575-6) and got following
> results:
> 
> Speed: 66MHz (optimized for speed, no special tricks)
> Utilization: 30%
> 
> 
> btw. the muxes are quite huge :) FPGA architectures usually have some
> problems with complex multiplexer structures.

That's obvious if you have nothing but 4-input cells...
And the code clearly wasn't written with FPGAs in mind.

Would a big AND-OR be faster?  I remember that some FPGAs have dedicated,
fast `cascade chains' which could do the trick.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/