Re: [f-cpu] Bit Shuffler (Take 2)

[Yann Guidon <whygee@f-cpu.org>]

hello,

Michael Riepe wrote:
> On Fri, Sep 28, 2001 at 12:46:03PM +0300, Kim Enkovaara wrote:
> [...]
> > I hate to dissapoint you, but this new version is slower. It got 56MHz in
> > the synthesis run for the same chip. I'll try to run the whole Xilinx flow
> > to the different versions at some point. But the synthesis results usually
> > correlate quite well to the actual results. Especially if some
> > floorplanning is done.
> 
> Hmm...  maybe I should try something different.  Can you please synthesize
> the attached file?  It's a self-contained 64-bit 'rotate right' entity
> with explicit and/or gates which may become the new Shuffle64 core --
> if it's fast enough.
> 
> I'm afraid we're hitting the `6 gates' rule with the bit shuffling
> unit, no matter how we implement it.  Maybe we should add a second
> stage to the `bitwise' pipeline (shift/rot/bitrev operations).

it's clear that if it's not fast enough, pipelining is necessary.
We'll keep the other strategies in stock, so the user can decide
which version to use, if it synthesises better with its target
implementation.

However, good sense says that most often used operations must be faster :
ROL, ROR, SHR, SLR and SHL are the most critical operations.
It is not "critical" if SDUP takes two cycles instead of one.

>  Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
>  "All I wanna do is have a little fun before I die"
WHYGEE
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/