Re: gEDA-user: A couple o' questions

[Dan McMahill <dan@xxxxxxxxxxxx>]

John Doty wrote:

> In my IC design work it would be useful to detect floating nets. DRC  
> tries, but since it doesn't understand globals or subcircuit I/O  
> connections, it screams about numerous non-problems, hiding the real  
> trouble. But a SPICE "OP" analysis is usually pretty effective here.

Watch out on the floating net bit.  Suppose you have a power down or 
standby mode.  You might find that nodes which were driven by FETs that 
were turned on are now "driven" by FETs which are turned off.  You have 
multiple connections, it's just that nothing is connected to the node 
that clearly defines what voltage you'll get.

"Hey, why does it take 5 minutes to enter standby mode"

-Dan