Re: gEDA-user: A couple o' questions

[Karel Kulhavy <clock@xxxxxxxxxxxxx>]

On Wed, Apr 05, 2006 at 11:59:37PM -0400, Dan McMahill wrote:
> DJ Delorie wrote:
> >>1) grow all soldermask relief by min_soldermask/2.
> >>2) verify that all pads are in little islands of soldermask relief with 
> >>no other pads
> >
> >
> >Do we already check for too-small necks in polygon clearances?  If so,
> >why not re-use that code?
> >
> 
> we don't as far as I can tell.  I just tried putting 2 vias very close 
> to each other in a rectangle of copper such that the remaining copper in 
> between was only about 1 mil wide.  With a 5 mil min width DRC rule I 
> did not get a failure.  Hmm, I also found another case which confuses 

Is it a DRC failure? I have my boards full of such shit and I don't
care. I think the 1mil wide think cannot peel off and float because it's
held on both ends. Maybe it can get interrupted but I don't rely with
my groundplane connectivity on such thin places.

CL<

> DRC.  I drew a 1 mil wide line and then covered it with a 50 mil wide 
> line.  DRC complains that I have a line which is too narrow.
> 
> -Dan
>