Re: gEDA-user: Open VHDL Simulators?

[al davis <ad151@xxxxxxxxxxxxxxxx>]

On Friday 25 April 2008, Stephen Williams wrote:
> As you know, this year's Icarus Verilog GSoC candidate is
> working on a VHDL code generator back-end for Icarus Verilog.
> Hooray! But suddenly the obvious question comes up, "How are
> we going to run these generated files?" I'm here looking for
> suggestions.

What you need is the ability to translate the other way too.  
That way, you can go around the loop and see if you get 
equivalent Verilog back.

Going both ways has another obvious benefit.  We would get real 
VHDL support too.

On Friday 25 April 2008, Stephen Williams wrote:
> It just seems like ghdl has the most activity associated with
> it, but FreeHDL doesn't look completely dead either. So what
> to choose?

Another case of free projects not working together.....

FreeHDL is hosted at seul.org, but seems to have the closest 
ties with qucs.




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