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Re: gEDA-user: Looking for tips to debug Icarus Verilog
For those of you who might be interested... I found the bug in my
verilog code that was triggering the crash. I had a spelling mistake
in one of my nets that resulted in a net being implicitly declared.
Personally, I don't think that this should trigger a crash of the
compiler (and perhaps it doesn't on other systems), but I'm past my
current hurdle.
I guess I'm looking for recommendations as to what I should do next.
Some ideas that come to mind are:
1) Add a page to the iverilog wiki outlining some tips for debugging
iverilog (such as the use of the "-v" flag, the use of the
IVERILOG_ICONFIG environment variable, the importance of spelling
IVERILOG_ICONFIG correctly, etc...) If such information already
exists somewhere, then I missed it, and I probably don't need to
replicate it.
2) Continue to debug ivl to determine why this particular assertion is
triggered when this particular net is implicitly defined when running
ivl on my particular machine. From what I've seen of the code so far,
there will be a fairly steep learning curve associated with figuring
this out, but I am probably up to the task (although the time
commitment is somewhat scary.)
3) Send some combination of my current verilog code and/or the
intermediate files to somebody else to see if the problem can be
replicated on another platform. Ideally that somebody would be
intimately familiar with the code and would be able to spot the bug in
less than 5 minutes (assuming that it is reproducible).
4) Narrow my code down to the barest minimum set of code that
reproduces the crash and try steps 2 or 3.
Any suggestions?
--wpd
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