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Re: gEDA-user: PCB Netlist syntax
I managed to edit the netlist file manually (in gedit) and added the
word 'Power'. Seems it is case sensitive _and_ tab sensitive. To
summarize, the syntax of the style allocation should be:
netname <SPACE> style_name <TAB> pin pin pin
where stylename is Case sensitive. e.g. "Power" worked; "power" did not...
Yes it would be good if gnetlist could read some attribute like
routestyle or something... But adding it manually isn't such a hard
job at least for small boards...
Thanks again!
~Abhijit
On Tue, Apr 5, 2011 at 22:39, DJ Delorie <dj@xxxxxxxxxxx> wrote:
>
> The syntax allows a net style there, but nothing in gschem produces it
> so nothing in pcb uses it.
>
>
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