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Re: gEDA-user: Icarus Verilog: FPGA-like automatic initialized registers?
From: Tommy Thorn <Tommy@numba-tu.com>
Stuff deleted for bandwidth's sake.
On Sunday 10 August 2003 11:41, Alexander Perry wrote:
This doesn't answer your question, since I don't know of one, but
it is generally a good idea to write the explicit initialization
(a) so you can migrate the design to ASIC at a future time,
(b) some CPLDs have defaulted registers boot up to all '1',
(c) the formalism has helped me to find hidden bugs and stuff,
(d) most of my FPGA designs have a software reset pin anyway,
(e) relying on a nonstandard feature leads to nonportable code.
For a lot of industrial uses, (d) is a critical factor because
ram-based FPGAs take a long time to boot. Often much longer than
you can afford to wait when just seeking to do a subsystem reset.
These are all good points, but given my design will always be FPGA specific,
(a) and (b) doesn't apply. (e) is true in general, but all I was looking for
was for the simulation to be more faithful to the reality. The reality is
that for SRAM based FPGAs, the registers *are* defined upon boot. From a
synthesis point of view, the code did not change or become less portable
(amoung SRAM based FPGAs). From a synthesis point of view, the code did not
change or become less portable (amoung SRAM based FPGAs).
A couple of points here - I agree with ALL of the points that Alexander
mentioned, and would point out that in general you are asking for the
simulator to act in a "non-standard" way. Verilog itself (not talking
system verilog) doesn't provide for this mechanism. It wants X's
nominally for unintitialized structures. That being the case, it would
be a rather large exception. I would think that building a reset
structure in the hardware might be a better solution all the way
around! Makes the design portable beyond ASICS. As for sentiments like
"my design is always going to be in ASICS" - I've been makeing a living
lately porting FPGA designs to ASICS ;-) You just never know.
That's my 2 cents worth.
Steve Wilson
If I could find a not too intrusive way to tell Icarus the initial values of
registers, then that would be acceptable (again, arrays are the main
problem).
Thanks,
Tommy