Re: gEDA-user: logic analyzers, verilog, and gtkwave...

[asomers@xxxxxxxxx]

Have you heard of the free logic analyzer?
http://www.sump.org/projects/analyzer/ .  It uses a xilinx dev board
and java control software.  It has also been ported to several other
FPGA boards.  The serial interface might be simple enough for you to
use with your project.  At my last job, I used this board for
debugging SPI and I2C interfaces.

Unfortunately, the author seems to have stopped maintaining it.  The
last release was 2.5 years ago and I never heard back regarding a
patch I submitted.
-Alan

On Sun, Aug 9, 2009 at 6:51 AM, Larry Doolittle<ldoolitt@xxxxxxxxxxxxxxx> wrote:
> DJ -
>
> On Sun, Aug 09, 2009 at 05:51:40AM -0400, DJ Delorie wrote:
>> The LA module I wrote is a DDR dual-bank capture, [chop]
>> A perl script turns them into a VCD file that gtkwave can read :-)
>
> Awesome.  I hope you'll write this up more, and publish code.
>
>> Question: Can gtkwave be told to break up a bus into its component
>> signals?
>
> It's in the Edit menu, called "Expand" (F3).
>
>   - Larry
>
>
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