Re: gEDA-user: Yet another netlister

[John Doty <jpd@xxxxxxxxx>]

On Aug 15, 2009, at 11:28 AM, al davis wrote:

> On Saturday 15 August 2009, r wrote:
>> On Sat, Aug 15, 2009 at 5:12 AM, al
> davis<ad252@xxxxxxxxxxxxxxxx> wrote:
>>> A netlister needs to work for all symbols.  No exceptions.

Hmm, most netlisters don't know what to do with a spice-options  
symbol. And that seems reasonable. VLSI cell symbols don't have  
footprints, so you can't use them in a PCB flow. And what's SPICE to  
do with a connector?

>>
>> Why? Should it work even for symbols without models or
>> incompatible models (e.g. verilog RTL in an analog AC
>> simulation)?
>
> You cannot possibly know about all possible symbols that may be
> created in the future.  So, the netlister cannot have explicit
> knowledge of them.  It must work in general.
>
>>> For
>>> Spice format, you can go nuts with all of the special
>>> cases. There are ways to control it, but you can't fix it
>>> completely.
>>>
>>> This means the netlister cannot have explicit knowledge of
>>> any particular symbol.
>>
>> Well, currently it has. I would actually prefer it the other
>> way around, so that some particular symbols (especially
>> primitive devices) had explicit knowledge of a netlist
>> format.
>
> You cannot possibly know about all possible netlist formats a
> symbol might be used for.
>
> A netlister for an irregular output format might need to key on
> some attribute to decide what to do, but this is not the symbol
> itself.

That's what we do now. That was the complaint.

>
> You could define an attribute that identifies special
> properties, and the netlister could key off of that.  How about
> a "special_target" attribute, where you could specify special
> treatment.
>
>
>
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John Doty              Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd@xxxxxxxxx




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