gEDA-user: gEDA, layout, etc.

[Dan McMahill <dan@mcmahill.net>]

Hi Bill,

Hopefully I didn't come off too harshly in my reply about gEDA and guile.
I too have been working too hard and have been really burned recently with
cadence and have been annoyed that they couldn't just fix it for me when
my guess is that its a fairly easy fix.

Anyway, I've been wondering, what are you using for layout and LVS on the
chips you're doing with gschem as the schematic capture?  Is magic modern
enough to do things these days?  It seems like last time I searched for
an opensource netlist comparison tool (for LVS or even SVS), I didn't get
too far.

-Dan

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