Re: gEDA-user: Bug fixed?

[David Howland <dhowland@xxxxxxxxxxxxx>]

I'm sorry about all the mail to the list, I've just 'discovered' the 
gEDA tools (more specifically iverilog).

After changing my code to run through the icarus synthesis flow, I 
finally end up with these:

fpga.tgt: IVL_LPM_CMP_EQ not supported by this target.
fpga.tgt: IVL_LPM_CMP_EQ not supported by this target.
fpga.tgt: IVL_LPM_CMP_GT not supported by this target.
...and so on.

Really I can't seem to get any of my designs to make it through 
synthesis, even though they all work in <unnammed fpga vendor tool>.  My 
question is this:  Is the synthesis tool "ready"?  We all have 
deadlines, should I put this work away, or is there hope for the 
fpga-lpm flow?

-d