Re: gEDA-user: Heavy Symbols and such

[Steven Ball <hamster@xxxxxxxxxxx>]

I've been thinking about this a bit, and here's my 2 cents:

gschem and pcb both really just want light symbols/footprints.  It  
would never really be a good idea to expect to stick one into the  
other, I mean, what if you change packages or something?  I guess you  
could up rev the schematic or whatnot, but I'd prefer that bit of  
things to be divorced.

So, in order to go from gschem to pcb, we have the step of gsch2pcb,  
or the 'new' xgsch2pcb.  What if the gui was extended such that you  
get a list of parts, maybe even a window with a zoomed in part of the  
schematic highlighting the part you currently have selected, with  
another part of the screen showing possible footprints for this  
device?  Maybe even tie it into a database off gedasymbols to make use  
of all the good work happening there?  So, you pick a footprint, maybe  
get a preview of what it looks like and a little text box with  
details.  Then, you could step through and pick footprints for pcb.   
If you explicitly specify a footprint the 'old' way via footprint= in  
gschem, you could have it skip this pick step.  Once you are done,  
there ya go, footprints populated for pcb to pull in with a netlist.   
You could even go back and change footprints, just like if you were to  
change the schematic footprint= and re-gsch2pcb.

Then, you'd just need to maintain a mapping of symbol -> footprint  
somewhere.  I'd love to see this be able to tie into a filesystem, a  
database, and even gedasymbols as sources.

Of course, that all sounds like work and whatnot, but I'd be willing  
to help out.

-Steve


On Dec 5, 2007, at 3:03 PM, Dave N6NZ wrote:

>
> Steve Meier wrote:
>> Dave,
>>
>>
>>
>> I have been thinking that the way to do back annotation is to add a
>> schematic level attribute that is attached to a symbol. Something  
>> like
>>
>> C 8500 9600 1 180 0 big_fpga-1.sym
>> {
>> T 8300 9100 5 10 1 1 180 0 1
>> refdes=U1
>> T -100 -100 5 10 1 1 180 0 1
>> pinswap=a12,g13
>> }
>>
>> This could then be used when viewing the schematic or generating a
>> netlist to swap the two pins.
>
> This seems like a good idea.  In fact, it strikes me as very similar  
> to
> the "slots" concept.  With slots, we have "numslots", "slot", and
> "slotdef".  Perhaps pin swapping has an orthogonal set of attributes.
> Of course, pin swapping interacts with slot swapping -- think of our  
> old
> friend the 74xx00 -- four slots, each with swappable inputs within  
> the slot.
>
> I suppose today one could define 8 slots for a 7400, sounds a little
> odd, but the point is you would only use 4 of them at a time.  Each  
> slot
> would be defined twice -- once for each possible swap. Obviously, this
> leads to combinatorial explosion, but for practical parts it might be
> OK.  I think the right answer is that slots map pinseq #'s onto  
> logical
> pins, and "swaps" map the logical pins onto physical pins, which
> requires an extra layer of symbolic pin names in between slots and  
> swaps
> that does not currently exist.
>
> I like the idea of the netlister being able to read a file of slot=N  
> and
> swap=N attributes and generate the netlist accordingly.  Then after  
> the
> layout is done, gschem could import the same file to update the
> attributes to accomplish back-annotation.
>
> And let's not forget my desire to target multiple package pin-outs --
> but I think that can be handled by creative use of slots, although  
> its a
> bit of a hack.
>
> -dave
>>
>> Steve Meier
>>
>> On Wed, 2007-12-05 at 10:13 -0800, Dave N6NZ wrote:
>>> Steve Meier wrote:
>>>> Eventually, I would also like to see being able to define the logic
>>>> level for a group of pins, can the pins be used differentialy? if  
>>>> so
>>>> which pins are paired? Can we swap pins if so which ones?
>>> The pin swapping question brings up another of my pet peeves --  
>>> when the
>>> same part comes in packages with different pin outs, it needs  
>>> different
>>> symbols.  Although -- last night it occurred to me that I could use
>>> slots to fake that out.  Even if the part isn't slotted, I could  
>>> define
>>> a slot for each package pin out.
>>>
>>> But it really points out the fact that there is a level of  
>>> abstraction
>>> missing in the current symbol definition, and that interacts with  
>>> back
>>> annotation from what ever PCB layout tool you are using.  Maybe the
>>> netlister needs to be enhanced to be a more interactive tool  
>>> instead of
>>> a one-way translator to make all the work well.
>>>
>>> -dave
>>>
>
>
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