Re: gEDA-user: Erroneous rats added to PCB

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Thu, 2010-12-16 at 16:09 -0500, Peter Laurich wrote:
>    Has anyone else seen this problem?
>    More importantly, any idea what I am doing incorrectly?

No, and probably nothing...

Any chance you could try a git checkout and test building PCB from that?

git checkout git://git.gpleda.org/pcb.git

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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