Re: gEDA-user: Erroneous rats added to PCB

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Fri, 2010-12-17 at 00:42 +0000, Peter Clifton wrote:
> On Thu, 2010-12-16 at 16:09 -0500, Peter Laurich wrote:
> >    Has anyone else seen this problem?
> >    More importantly, any idea what I am doing incorrectly?
> 
> No, and probably nothing...
> 
> Any chance you could try a git checkout and test building PCB from that?

Ignore that request.. it was _ME_ who was not up to date with git HEAD.
The bug was introduced in a recent commit:

dbf835c02cda1d16157a83f8c1b9b1da2a05400a

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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