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gEDA-user: PCB-> net specific constraint



Hi,

Before I explain what I am doing, the questions I have are more
appropriate on the dev list, but I am not subscribed currently to that
list so I'll post them here. My apologies for that.

Lately I have been working on the PCB sources to implement the following:

- Rat colors can be adjusted for each net
- Routestyles can be adjusted on a net level basis in manual and
autorouting

Multi ratcolors are IMHO useful to make a distinction to important or not
so important nets. I.e. usually when I design a board I'd like to
distinguish between GND nets and other nets. Right now this is working ok.
I have put up two screenshots which demonstrate what I meant:

http://www.xs4all.nl/~vzzbx/pcb/

Routestyles:
So far I have them working ok just for manual routing, autorouter does
not work yet. The clearance bit however does not work yet and right now I
am a bit at a loss how to get it to work if  AutoDRC is switched on. Is
it possible one of the devs can elaborate me on that point?


Thanks,

Hans
 

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$ cat .sig /dev/null


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