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Re: gEDA-user: Trace impedance calculations in PCB



On Thu, Feb 12, 2009 at 8:43 PM, Dan McMahill <dan@xxxxxxxxxxxx> wrote:
> What do you have in mind?  What should the calculations provide?  How
> would you want to access them?

I have a range of things on my wish list.  I originally thought it
would be best to include at least the first few of these in PCB
(ctrl-R on a trace and get all of the impedance information pcb has
for it), but running the pcb file (or an extracted file) through an
external tool would be fine too.  Bearing in mind that I just started
thinking about this today, here is my wishlist, in the order I think
it would be sensible to implement them:
1) select a trace and get length, area, number of vias, number of pads
2) ability to provide a stackup file which can be matched with pcb layers.
3) Specify an impedance for a route type and have pcb calculate the
required width
4) Designate XY pairs and critical nets
5) DRC warning if XY pair is separated or something may significantly
affect trace impedance (like running a trace over a discontinuity in
the ground plane) for routes with a specified impedance.
6) Ability to assign load impedances to pads generically (applied to
all pads) and specifically, possibly semiautomatic based on pin type.
7) Ability to specify timing constraints for a net and have DRC verify
this based on above.
8) Calculate a matrix of mutual impedances between all nets, highlight
critical nets
9) calculate resonant frequencies of nets and image planes, give
warnings when additional bypass and decoupling might be required.
10) extract pcb characteristics and back-annotate to a netlist for
functional simulation.

I've only done three boards with geda/pcb and I still very much
consider myself a novice, so some of these may be much more difficult
than I think or less useful than I'd hope.
-Jeff.


>
>
> -Dan
>
>
>
>
>
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