Re: gEDA-user: autogenerate documentation to track project progress

[Dan McMahill <dan@xxxxxxxxxxxx>]

Chitlesh GOORAH wrote:

> Currently, I code with ghdl and generate its documentation(pdf) with
> doxygen + my latex template, thereby I have an updated documentation
> which helps me track the work done and progress made by different
> designers. The same documentation I use during my progress meetings
> and sometimes hand it over to the client with the company's logo. This
> autogeneration of such document/pdf cost me roughly 5 seconds.

are you saying you use doxygen with your VHDL code?  I thought doxygen 
was fairly heavily tied to the C language to the extent that it even had 
a parser?  Did I completely miss something there?  I'm asking because I 
would love to use something like doxygen for documenting some code 
written in other languages.


As far as pcb/gschem, you can certainly extract a BOM from the command 
line (from either tool in fact).  hmm.... I wonder.. if it would make 
sense to teach one or both of the BOM generators to have a LaTeX option 
to directly format the output in longtable format.  Probably it's best 
to leave that to a simple external script.

Layout pictures can be generated from the command line and the fab 
drawing layer has the board size in it.  You can't currently directly 
extract the size though.  For a board that doesn't use the 'outline' 
layer, it is a simple awk task to grab that out of the .pcb file but 
with the outline layer it is a bit more work.  What would you envision 
for the mechanics of how you get this info out and what format would it 
come out in?

Schematics can be generated from the command line.



-Dan


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