gEDA-user: Schematic comments

[Stephen Williams <steve@icarus.com>]

Stefan,

I've been staring at the data sheet for the FX and I noticed that if
we use PB and PC ports, then a 52 pin part is possible.

The pins of port B would be find for an 8-bit wide set of ports. This
is enough for JTAG plus a few spares, and can also be controlled by
the GPIF A data bus if someone figures out the GPIF controller.

B and C ports also include UART TxD and RxD signals, so the 16 bits
are cut down to 14 bits if one UART is used. Since JTAG only needs
5 bits, that doesn't seem like a problem.

Also, if I read the data sheet correctly, the 56pin packages are
limited to 48MBytes/s burst transfer rate. I really doubt that is a
serious handicap for a JTAG scanner:-)

Thoughts?

-- 
Steve Williams                "The woods are lovely, dark and deep.
steve@icarus.com              But I have promises to keep,
steve@picturel.com            and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."