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Re: gEDA-user: silkscreen patches



> I have made two patches (separated by a line of ========= ) that exclude
> silkscreen from the areas that are not covered by soldermask. Usually
> silkscreen goes over these areas and then the solder would be contaminated and
> the soldering process probably ruined.

There are two sources of silkscreen:

1. Elements.  I suppose it's OK to automatically "fix" silk on
   elements as the user has little control over those (although, an
   element that violates that rule shouldn't be in the library in the
   first place).

2. User-placed silk.  We should teach DRC how to detect silk/solder
   conflicts and let the user decide how to fix it.  I don't think
   it's appropriate to just discard user silk.

Overall, I think DRC is the right place to deal with this problem.

There is no need to avoid silk over a via.

Assembly drawings should always have an outline printed.

What you call a "plan" others call an "assembly drawing".  The user
would need to be able to choose what label each part has (part number,
value, refdes, etc) for the print.