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gEDA-user: Vias with zero clearance in PCB?
- To: <geda-user@xxxxxxxx>
- Subject: gEDA-user: Vias with zero clearance in PCB?
- From: "Jose, Marshall" <Marshall.Jose@xxxxxxxxxx>
- Date: Mon, 9 Jan 2006 21:07:27 -0500
- Delivered-to: archiver@seul.org
- Delivered-to: geda-user-outgoing@seul.org
- Delivered-to: geda-user@seul.org
- Delivery-date: Mon, 09 Jan 2006 21:07:30 -0500
- Reply-to: geda-user@xxxxxxxx
- Sender: owner-geda-user@xxxxxxxx
- Thread-index: AcYVipqYPadRwzJ5TSuIqtaujcROjQ==
- Thread-topic: Vias with zero clearance in PCB?
Title: Vias with zero clearance in PCB?
I'd like to place numerous vias in a cluster to assist with heat transfer or RF shielding integrity. How can I do this in PCB?
I searched the geda website and the documentation with no luck? Is what I want possible in PCB?
Thanks,
Marshall