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Re: gEDA-user: Test pads in PCB



On 1/18/06, Stuart Brorson <sdb@xxxxxxxxxx> wrote:

> One clue:  When I stress or flex a failing board in the test system, I
> can often make it work (until I release the board).  This suggests
> cracked vias, ripped internal traces, or SMT passives with
> microcracks.  All of these are hard to find visually.  However, if the
> original designer had testpadded the board, we'd be able to reject
> these boards at the assembler.
>
> Given the amount of time I have spent debugging these board (usually
> with a factory tech idling beside me), added to the amount of
> management time spent holding senseless meeting about this problem
> board, and multiplied by the amount we are all paid/hour, I'd say that
> we have spent easily into the five figures because of this board.

It sounds like your vendor(s) have process control problems.  If a
vendor can not demonstrate that they can control there processes you
should a new vendor. The ROI should be easy to show.

Testing fully assembled boards is too late in the process.
If you start rejecting all the assembled boards you push
the process problems up-stream (a good thing) but you
shut down your production line (a bad thing). Is the
vendor going to repair the boards using the same out of
control processes that were used to build the rejected boards?

You should have your vendor periodically run test boards that
directly measure the various process parameters. This is much
easier to do on a dedicated test board.

Who is responsible for the component quality? Does the vendor
provide incoming inspection or source inspection? If the assembly
house does not perform this function then someone for your shop
needs to do this.

(* jcl *)

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