Re: gEDA-user: Thermal via in pad

["KURT PETERS" <peterskurt@xxxxxxx>]

David, this is way off topic.  But I noticed that your traces seem to change 
sizes at the silk-screen for the Brown ones (Vcc Comp).  Is there any 
particular reason that you do that?
Regards,
Kurt

_______________________
Message: 3
Date: 11 Jan 2007 23:52:17 +0100
From: David Kuehling <dvdkhlng@xxxxxx>
Subject: gEDA-user: Thermal via in pad
To: geda-user@xxxxxxxxxxxxxx
Message-ID: <87hcuxqiqm.fsf@xxxxxxxxxx>
Content-Type: text/plain; charset=us-ascii

Hi,

I just noticed that punching a via into a large ground pad does not
produce a non-copper (clearance) ring around the via, as it would do for
vias inside polygons, see screenshot:

http://user.cs.tu-berlin.de/~dvdkhlng/via-in-pad.png

I guess such kind of via wouldn't be manufacturable since it isn't
thermally shielded from the surrounding pad?

Or is it just a bad idea to connect die-attach-pads directly with vias?

David
--
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