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gEDA-user: Graphics layers in pcb
I'd like to add some non-silk graphics to my pcb layout (Dimensions of a
cooler). I added a separate layer for this purpose. However, lines put in
this layer are interpreted as copper when crossing vias or pads. This
confuses the generation of rats. Is there a way to make a layer
completely insensitive to all connectivity operations?
---<(kaimartin)>----
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Kai-Martin Knaak tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211
Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de
GPG key: http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmk&op=get
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