Re: gEDA-user: Graphics layers in pcb

[DJ Delorie <dj@xxxxxxxxxxx>]

> I'd like to add some non-silk graphics to my pcb layout (Dimensions
> of a cooler). I added a separate layer for this purpose. However,
> lines put in this layer are interpreted as copper when crossing vias
> or pads. This confuses the generation of rats. Is there a way to
> make a layer completely insensitive to all connectivity operations?

Not at the moment.


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