Re: gEDA-user: gnetlist -g verilog questions

[John Griessen <john@xxxxxxxxxxxxxx>]

Mike Jarabek wrote:

>>
> Interesting... The name is supposed to come from one of the attributes 
> inside the symbol. It also looks like the symbol has the positional 
> ports attribute set on there, I've found that isn't usually what you 
> want to do. 

I found your example schematic in the geda-gaf/gnetlist/examples dir...

and added device=2-term-device for my test schematic, and also took out POSITIONAL..

and get a good netlist.  So now this is all working as you say it should and will
be very helpful in making a verilog-ams test suite and some examples that make
netlists gnucap can use.


I'll be making a little library of devices with IO pins to be connected up
to charge conserving nodes according to verilog-ams.  Also some INPUT OUTPUT
ones to be volt sources to drive circuits as simplest case of a test bench.
The test suite will be comparing to know good output with diff, so each test
schematic will be smaller than your example.

good netlist:
----------------------------
module verilog_io (
        GND ,
        C ,
        A
       );

/* Port directions begin here */
inout GND ;
inout C ;
inout A ;


/* Wires from the design */
wire C ;
wire GND ;
wire B ;
wire A ;

/* continuous assignments */

/* Package instantiations */
\2-term-device  X2 (
     .IO1 ( B ),
     .IO2 ( C )
     );

\2-term-device  X3 (
     .IO1 ( GND ),
     .IO2 ( B )
     );

\2-term-device  X1 (
     .IO1 ( A ),
     .IO2 ( B )
     );

endmodule

John Griessen


-- 
Ecosensory   Austin TX


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