Re: gEDA-user: blue sky ideas : side-effects on circuit modelling?

[Tim Golden <timgolden@xxxxxxxxxxxxxxxxxx>]

Hi John.

No, I do not have any funds.

I was a software developer in the past but my current income is very
small.

My understanding is that if things are done cleanly then we may not be
building a goliath, and so little funding would be necessary.
My query was more on getting back from a PCB layout to the schematic
level, whereby traces and parts layout could be integrated as component
level interactions. Granted there are the puzzles of distributed emag
here, but in the core of DJ's presentation I thought there was a level
of abstraction which might be leveraged in the long term toward this
end. By keeping this in mind in the next step it may be that the next
ten steps will be that much easier. Still, my understanding of the
problems are incomplete and I apologize if this thinking is
inapplicable. 

Even just a trace length minimizer will be engaging in those part
choices of the notation
   [ (...),(...) ]
so that specing them in the intial schematic has been abstracted out.
This suggests a reverse schematic will be presented, and thus the
bidirectional nature of the tool that is being discussed is engaged.

 - Tim

p.s. just came accross this link which I thought some here might
appreciate:
   http://www.sandiego.edu/~ekim/e194rfs01/lec01ek.pdf 
and more one node back:
   http://home.sandiego.edu/~ekim/e194rfs01/index.html

This awareness indicates even a 3D level of awareness will be necessary
in the ultimate form, which I am fairly sure goes beyond the next step,
but maintaining an awareness of those ultimate goals could be
instructive to the implementation of the next step. 

Some snip below...
 
On Sun, 2010-01-03 at 16:21 -0600, John Griessen wrote:
> Tim Golden wrote:
> > I was just reading
> >    http://www.lorentzsolution.com/technology.html
> > and thought I would query whether or not the 'blue sky' intiative would
> > have any side-effects in terms of SPICE modeling and beyond. In the
> > abstraction of the parts layout could it be that there would be a
> > backflow solution to SPICE models? I say backflow because gEDA currently
> > flows from schematic to SPICE and to layout, but not the other way
> > around.
> 
> Sure, those are long term goals behind some of the blue-sky DJ was discussing.
> It's called blue-sky because it's not funded yet, which makes it kind of far off.
> possibly with some reminders of the desired flow if the user sets it up that way.  A step by step
> path from schematic to sim and back would go like:
> 
> 1. start gschem, load circuit
> 2. call gnetlist with Verilog-ams backend from a gschem button, (or not)
> 3. start gnucap, using gnucap specific commmand line args to load the Verilog-ams netlist just created
> 4. Use gnucap specific commands to run simulation(s)
> 5. Use gnucap specific commands to save simulated data
> 6. View simulated data in whichever viewer you can get to run from a package or compile on your machine,
> 	gwave, kjwaves, etc, including just plain old gnuplot.  (gwave is supported package
> on Fedora or Red Hat, but debian is problematic to get it compiled -- tries one's patience
> and the debian package was broken recently...)
> 7. decide your netlist changes are good after viewing sim data and import the new netlist into gschem by
>       running a translator program then load that new schematic name.
> 
> There is nothing standardized or agreed upon about this yet -- it is all do it yourself.
> I can be hired to work on that though :-)
> 
> I think the idea of EM based verification is ripe.  We have MEEP and gnucap and they
> are open and possible to move data between.  Have you got a budget for developing it?
> 
> John
> 
> 
> 
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TimGolden BSEE AB1AH PolySign http://www.BandTechnology.com 1262652820s



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