Re: gEDA-user: No-Net Copper

[John Griessen <john@xxxxxxxxxxxxxx>]

On 01/01/2011 12:20 PM, Rick Collins wrote:
> If copper is left behind because of manufacturing, it doesn't really impact the layout process or connectivity checking.

Sure does if it is DRC rule close -- it could be short in etching process results.



On 01/01/2011 01:58 PM, Christian Riggenbach wrote:
>   press 'f' (to mark it as "found")
> - start the line from the not marked copper. Both should now be marked as
>   "found" and should be connectable.
>
> This is possible, because "Auto enforce DRC clearance" only relies on the
> "found" flag. Also it only resets the "found" status on entering the "line"
> mode.

I suppose toggling enforce makes sense if that's the way it is.

I wish we were attaching netnames to pcb trace segments as we create them and using that
to do auto enforce without having to toggle of add f flags first.

Guess I need to try out that Auto enforce DRC feature -- I've never purposely
used it yet, but have seen
it somewhere...showing up by accident.  :-)

John Griessen
--
Ecosensory   Austin TX


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