gEDA-user: 74xx symbols

[Jim Battle <frustum@pacbell.net>]

Hello --

I've just started using gschem and have finished my first schematic (8 TTL 
parts).  I'm reverse engineering an old computer and I'm using gschem to 
capture what I figure out.

Although I could have easily missed it, especially in older messages, I was 
wondering what was the procedure for

	1) contributing new symbols
	2) changing existing symbols

I realize that #2 is a potentially loaded question, but I'll ask anyway.

In the case of question #1, do I just post them to this newsgroup?  Mail 
them to the developer (the wonderful Ales V. Hvezda)?

In the case of #2, here are a couple of problems that I've seen, and I've 
only looked at half a dozen components that I've needed so far.

The 7403 is a qaud open collector 2-input nand gate.  The symbol doesn't 
reflect the fact that it is open collector (conventionally signified by an 
arc on the inside of the gate, near the output).  Would anybody object if I 
added one?  Other parts may have this problem too (although I see that the 
7407 uses a diagonal line near the output to serve the same purpose -- OK).

Some parts, for example, the 7474 and the 74175, have complementary 
outputs.  The symbol in the library shows one with a bubble and one 
without, but the label near the bubble is "/Q".  Although I understand what 
was meant, it seems like a double negative.  I would label both outputs as 
"Q" and have a bubble on the negated one.  It is clear in these two cases 
what is meant, but being consistent is important if "bubble notation" is 
used more extensively, especially with parts that don't have complementary 
pins like this.

Another "problem" is that some parts could have other useful 
representations, but the library is lacking them.  Specifically, I was 
thinking about DeMorgan-ized forms of some of the logic gates.  That is, a 
2-input nand would also have a version that looks like an OR gate with 
bubbles on the inputs.  Ideally, the various forms would have the exact 
same schematic footprint to allow easy swapping of the versions.  However, 
this is starting to go down towards a development issue of supporting 
bubble notation more completely (I haven't used it in 10 years or so, but 
the Valid schematic editor had great support for doing things like changing 
between different demorgan forms of gates, and pushing bubbles through 
gates in a logically consistent manner, as well as pin swapping between 
logically equivalent pins in order to reduce wire crossings on the schematic).

Finally, I noticed that some parts don't have the implicit power and ground 
nets defined in the symbol, thus if the chip is used, these nets must be 
added on each instance.

Are these widely recognized problems?  Is anybody doing anything about 
them?  Does anybody want me to help fix some of these problems?

Thanks.
-----
Jim Battle == frustum@pacbell.net