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Re: gEDA-user: Gnetlist Verilog

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Subject: Re: gEDA-user: Gnetlist Verilog
From: User Tomdean <tomdean@xxxxxxxxxxxxx>
Date: Sat, 22 Jul 2006 12:52:33 -0700 (PDT)
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It looks like if I change all symbols to contain an attribute
  VERILOG_PORTS=POSITIONAL
the pin number will be commented out.

I want to avoid having two symbols for everything.

I am looking into something to carry over positional from the top
level schematic.

tomdean


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- Re: gEDA-user: Gnetlist Verilog
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References:
- gEDA-user: Gnetlist Verilog
  - From: User Tomdean
- Re: gEDA-user: Gnetlist Verilog
  - From: Mike Jarabek

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